Abstract
This paper presents a model-based FPGA (a type of reconfigurable digital integrated circuit) accelerator for well-known classical channel flow problem CFD simulation and compares its performance with CPU and GPU implementations. A 100-core pipelined solver for Couette–Poiseuille flow is developed using a Model-Based Design approach in MATLAB/Simulink environment, where the high-level algorithm is developed and automatically translated into HDL code (the source code of the accelerator) via MATLAB HDL Coder. The design achieves a 6.34× speed-up over the GPU on a 350× 350 grid with 177,824 iterations. The model-based workflow significantly reduces development time by enabling high-level algorithm design, automatic HDL generation, and early verification. Operating at 106 MHz, the FPGA solution offers high data processing capacity and low power consumption, making it an ideal choice for real-time, onboard CFD applications in energy-constrained aerospace systems. Experimental results demonstrate higher performance per watt and consistent timing compared to CPU and GPU alternatives. The results highlight the scalability and versatility of model-based FPGA acceleration for CFD and pave the way for future applications involving unstructured grids and more complex flow scenarios.
| Original language | English |
|---|---|
| Pages (from-to) | 53944-53957 |
| Number of pages | 14 |
| Journal | IEEE Access |
| Volume | 14 |
| DOIs | |
| Publication status | Published - 2026 |
Bibliographical note
Publisher Copyright:© 2013 IEEE.
Keywords
- computational fluid dynamics
- FPGA
- hardware accelerator
- high-performance computing
- model based design
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