A high linearity LNA using 180 nm CMOS technology for S-Band

Alican Caglar, Mustafa Berke Yelten

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Citations (Scopus)

Abstract

In this paper, a single-stage cascode low noise amplifier (LNA) was designed using UMC 180 nm complementary metal oxide semiconductor (CMOS) technology for 2.025-2.12 GHz (S-Band), specifically aimed for cryogenic applications. All transistor gates have electrostatic discharge (ESD) protection. The LNA achieved 15.8 dB gain, +2 dBm IIP3, and 1.6 dB noise figure (NF) at 2.075 GHz drawing 7.66 mA current from a 1.8 V supply. With regard to its counterparts, the LNA performs better in terms of its IIP3 outcome.

Original languageEnglish
Title of host publication2017 European Conference on Circuit Theory and Design, ECCTD 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538639740
DOIs
Publication statusPublished - 31 Oct 2017
Event2017 European Conference on Circuit Theory and Design, ECCTD 2017 - Catania, Italy
Duration: 4 Sept 20176 Sept 2017

Publication series

Name2017 European Conference on Circuit Theory and Design, ECCTD 2017

Conference

Conference2017 European Conference on Circuit Theory and Design, ECCTD 2017
Country/TerritoryItaly
CityCatania
Period4/09/176/09/17

Bibliographical note

Publisher Copyright:
© 2017 IEEE.

Funding

This work was sponsored by the Technological Research Council of Turkey under the project TÜBİTAK 1001 215E080 and Istanbul Technical University Department of Scientific Research Projects under the project 39465.

FundersFunder number
Istanbul Technical University Department of Scientific Research Projects39465
Technological Research Council of Turkey1001 215E080

    Keywords

    • complementary metal oxide semiconductor (CMOS)
    • cryogenic
    • electrostatic discharge (ESD)
    • Low noise amplifier (LNA)

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