Abstract
This paper describes a hardware accelerator design for converting quaternion to Euler angles using High Level Synthesis methodology. As a design methodology, automatic code generation from Simulink model, prototyping device, number representation, formulation, basic operators and basic functions are explained. A successful implementation is presented by giving validation and synthesis results.
| Original language | English |
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| Title of host publication | ICECS 2023 - 2023 30th IEEE International Conference on Electronics, Circuits and Systems |
| Subtitle of host publication | Technosapiens for Saving Humanity |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9798350326499 |
| DOIs | |
| Publication status | Published - 2023 |
| Event | 30th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2023 - Istanbul, Turkey Duration: 4 Dec 2023 → 7 Dec 2023 |
Publication series
| Name | ICECS 2023 - 2023 30th IEEE International Conference on Electronics, Circuits and Systems: Technosapiens for Saving Humanity |
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Conference
| Conference | 30th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2023 |
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| Country/Territory | Turkey |
| City | Istanbul |
| Period | 4/12/23 → 7/12/23 |
Bibliographical note
Publisher Copyright:© 2023 IEEE.
Keywords
- Euler angles
- HDL code generation
- HLS
- High-level synthesis
- quaternion