A CMOS FTFN realization with constant-gm rail-to-rail input stage

Mustafa Saygmer; Mustafa Altun; Hakan Kuntman

doi:10.1109/MELCON.2008.4618471

A CMOS FTFN realization with constant-g_m rail-to-rail input stage

Mustafa Saygmer^*, Mustafa Altun, Hakan Kuntman

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

In this paper, an alternative CMOS realization of an FTFN with a rail-to-rail input stage is proposed. Input stage of the presented circuit is based on a three-times current mirror to realize lowered gm deviation within the whole common-mode input range. Output stage of the FTFN is constructed with using active-feedback cascode current mirrors to obtain higher output resistance at the output nodes Z and W. The performance of the proposed FTFN structure is simulated with a novel grounded inductance simulating topology with applying on a third-order high-pass filter. All simulation results are given using SPICE simulation program.

Original language	English
Title of host publication	MELECON 2008 - 2008 IEEE Mediterranean Electrotechnical Conference
Pages	421-424
Number of pages	4
DOIs	https://doi.org/10.1109/MELCON.2008.4618471
Publication status	Published - 2008
Externally published	Yes
Event	MELECON 2008 - 2008 IEEE Mediterranean Electrotechnical Conference - Ajaccio, France Duration: 5 May 2008 → 7 May 2008

Publication series

Name	Proceedings of the Mediterranean Electrotechnical Conference - MELECON

Conference

Conference	MELECON 2008 - 2008 IEEE Mediterranean Electrotechnical Conference
Country/Territory	France
City	Ajaccio
Period	5/05/08 → 7/05/08

Keywords

Active network synthesis
CMOS FTFN
Inductance simulating

Access to Document

10.1109/MELCON.2008.4618471

Cite this

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title = "A CMOS FTFN realization with constant-gm rail-to-rail input stage",

abstract = "In this paper, an alternative CMOS realization of an FTFN with a rail-to-rail input stage is proposed. Input stage of the presented circuit is based on a three-times current mirror to realize lowered gm deviation within the whole common-mode input range. Output stage of the FTFN is constructed with using active-feedback cascode current mirrors to obtain higher output resistance at the output nodes Z and W. The performance of the proposed FTFN structure is simulated with a novel grounded inductance simulating topology with applying on a third-order high-pass filter. All simulation results are given using SPICE simulation program.",

keywords = "Active network synthesis, CMOS FTFN, Inductance simulating",

author = "Mustafa Saygmer and Mustafa Altun and Hakan Kuntman",

year = "2008",

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language = "English",

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series = "Proceedings of the Mediterranean Electrotechnical Conference - MELECON",

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booktitle = "MELECON 2008 - 2008 IEEE Mediterranean Electrotechnical Conference",

note = "MELECON 2008 - 2008 IEEE Mediterranean Electrotechnical Conference ; Conference date: 05-05-2008 Through 07-05-2008",

}

Saygmer, M, Altun, M & Kuntman, H 2008, A CMOS FTFN realization with constant-g_m rail-to-rail input stage. in MELECON 2008 - 2008 IEEE Mediterranean Electrotechnical Conference., 4618471, Proceedings of the Mediterranean Electrotechnical Conference - MELECON, pp. 421-424, MELECON 2008 - 2008 IEEE Mediterranean Electrotechnical Conference, Ajaccio, France, 5/05/08. https://doi.org/10.1109/MELCON.2008.4618471

A CMOS FTFN realization with constant-g_m rail-to-rail input stage. / Saygmer, Mustafa; Altun, Mustafa; Kuntman, Hakan.
MELECON 2008 - 2008 IEEE Mediterranean Electrotechnical Conference. 2008. p. 421-424 4618471 (Proceedings of the Mediterranean Electrotechnical Conference - MELECON).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - In this paper, an alternative CMOS realization of an FTFN with a rail-to-rail input stage is proposed. Input stage of the presented circuit is based on a three-times current mirror to realize lowered gm deviation within the whole common-mode input range. Output stage of the FTFN is constructed with using active-feedback cascode current mirrors to obtain higher output resistance at the output nodes Z and W. The performance of the proposed FTFN structure is simulated with a novel grounded inductance simulating topology with applying on a third-order high-pass filter. All simulation results are given using SPICE simulation program.

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