A chaotic time-delay system based digital RNG and integrated autonomous test suite

Ramazan Yeniceri; Alptekin Vardar; Erdem Cil; Latif Akcay; Emre Goncu; Mustak E. Yalcin

doi:10.1109/ECCTD.2017.8093272

A chaotic time-delay system based digital RNG and integrated autonomous test suite

Ramazan Yeniceri, Alptekin Vardar, Erdem Cil, Latif Akcay, Emre Goncu, Mustak E. Yalcin

Istanbul Technical University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Citations (Scopus)

Abstract

This paper presents a time-delay system which originally has chaotic behavior, yet lost that dynamic due to finite quantization levels of state variable representation. One method to overcome this destructive effect of digitalization is engaging a time-varying delay amount which is studied in this paper. Based on this system, random number generator (RNG) topologies are demonstrated with better throughput values in comparison with our previous implementations. Online performance monitoring ability is integrated to the RNG for a further investigation on physical implementation variations. The results related to the implementation area variation and target Field-Programmable Gate Array (FPGA) chip variation are reported and discussed. The initial findings promise an advanced usage of proposed RNGs as Physically Unclonnable Function (PUF).

Original language	English
Title of host publication	2017 European Conference on Circuit Theory and Design, ECCTD 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781538639740
DOIs	https://doi.org/10.1109/ECCTD.2017.8093272
Publication status	Published - 31 Oct 2017
Event	2017 European Conference on Circuit Theory and Design, ECCTD 2017 - Catania, Italy Duration: 4 Sept 2017 → 6 Sept 2017

Publication series

Name	2017 European Conference on Circuit Theory and Design, ECCTD 2017

Conference

Conference	2017 European Conference on Circuit Theory and Design, ECCTD 2017
Country/Territory	Italy
City	Catania
Period	4/09/17 → 6/09/17

Bibliographical note

Publisher Copyright:
© 2017 IEEE.

Access to Document

10.1109/ECCTD.2017.8093272

Cite this

Yeniceri, R., Vardar, A., Cil, E., Akcay, L., Goncu, E., & Yalcin, M. E. (2017). A chaotic time-delay system based digital RNG and integrated autonomous test suite. In 2017 European Conference on Circuit Theory and Design, ECCTD 2017 Article 8093272 (2017 European Conference on Circuit Theory and Design, ECCTD 2017). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ECCTD.2017.8093272

@inproceedings{21ee027447a949e09988d3fdd694f414,

title = "A chaotic time-delay system based digital RNG and integrated autonomous test suite",

abstract = "This paper presents a time-delay system which originally has chaotic behavior, yet lost that dynamic due to finite quantization levels of state variable representation. One method to overcome this destructive effect of digitalization is engaging a time-varying delay amount which is studied in this paper. Based on this system, random number generator (RNG) topologies are demonstrated with better throughput values in comparison with our previous implementations. Online performance monitoring ability is integrated to the RNG for a further investigation on physical implementation variations. The results related to the implementation area variation and target Field-Programmable Gate Array (FPGA) chip variation are reported and discussed. The initial findings promise an advanced usage of proposed RNGs as Physically Unclonnable Function (PUF).",

author = "Ramazan Yeniceri and Alptekin Vardar and Erdem Cil and Latif Akcay and Emre Goncu and Yalcin, {Mustak E.}",

note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 2017 European Conference on Circuit Theory and Design, ECCTD 2017 ; Conference date: 04-09-2017 Through 06-09-2017",

year = "2017",

month = oct,

day = "31",

doi = "10.1109/ECCTD.2017.8093272",

language = "English",

series = "2017 European Conference on Circuit Theory and Design, ECCTD 2017",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2017 European Conference on Circuit Theory and Design, ECCTD 2017",

address = "United States",

}

Yeniceri, R, Vardar, A, Cil, E, Akcay, L, Goncu, E & Yalcin, ME 2017, A chaotic time-delay system based digital RNG and integrated autonomous test suite. in 2017 European Conference on Circuit Theory and Design, ECCTD 2017., 8093272, 2017 European Conference on Circuit Theory and Design, ECCTD 2017, Institute of Electrical and Electronics Engineers Inc., 2017 European Conference on Circuit Theory and Design, ECCTD 2017, Catania, Italy, 4/09/17. https://doi.org/10.1109/ECCTD.2017.8093272

A chaotic time-delay system based digital RNG and integrated autonomous test suite. / Yeniceri, Ramazan; Vardar, Alptekin; Cil, Erdem et al.
2017 European Conference on Circuit Theory and Design, ECCTD 2017. Institute of Electrical and Electronics Engineers Inc., 2017. 8093272 (2017 European Conference on Circuit Theory and Design, ECCTD 2017).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A chaotic time-delay system based digital RNG and integrated autonomous test suite

AU - Yeniceri, Ramazan

AU - Vardar, Alptekin

AU - Cil, Erdem

AU - Akcay, Latif

AU - Goncu, Emre

AU - Yalcin, Mustak E.

PY - 2017/10/31

Y1 - 2017/10/31

N2 - This paper presents a time-delay system which originally has chaotic behavior, yet lost that dynamic due to finite quantization levels of state variable representation. One method to overcome this destructive effect of digitalization is engaging a time-varying delay amount which is studied in this paper. Based on this system, random number generator (RNG) topologies are demonstrated with better throughput values in comparison with our previous implementations. Online performance monitoring ability is integrated to the RNG for a further investigation on physical implementation variations. The results related to the implementation area variation and target Field-Programmable Gate Array (FPGA) chip variation are reported and discussed. The initial findings promise an advanced usage of proposed RNGs as Physically Unclonnable Function (PUF).

AB - This paper presents a time-delay system which originally has chaotic behavior, yet lost that dynamic due to finite quantization levels of state variable representation. One method to overcome this destructive effect of digitalization is engaging a time-varying delay amount which is studied in this paper. Based on this system, random number generator (RNG) topologies are demonstrated with better throughput values in comparison with our previous implementations. Online performance monitoring ability is integrated to the RNG for a further investigation on physical implementation variations. The results related to the implementation area variation and target Field-Programmable Gate Array (FPGA) chip variation are reported and discussed. The initial findings promise an advanced usage of proposed RNGs as Physically Unclonnable Function (PUF).

UR - http://www.scopus.com/inward/record.url?scp=85039920258&partnerID=8YFLogxK

U2 - 10.1109/ECCTD.2017.8093272

DO - 10.1109/ECCTD.2017.8093272

M3 - Conference contribution

AN - SCOPUS:85039920258

T3 - 2017 European Conference on Circuit Theory and Design, ECCTD 2017

BT - 2017 European Conference on Circuit Theory and Design, ECCTD 2017

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2017 European Conference on Circuit Theory and Design, ECCTD 2017

Y2 - 4 September 2017 through 6 September 2017

ER -

Yeniceri R, Vardar A, Cil E, Akcay L, Goncu E, Yalcin ME. A chaotic time-delay system based digital RNG and integrated autonomous test suite. In 2017 European Conference on Circuit Theory and Design, ECCTD 2017. Institute of Electrical and Electronics Engineers Inc. 2017. 8093272. (2017 European Conference on Circuit Theory and Design, ECCTD 2017). doi: 10.1109/ECCTD.2017.8093272

A chaotic time-delay system based digital RNG and integrated autonomous test suite

Abstract

Publication series

Conference

Bibliographical note

Access to Document

Other files and links

Fingerprint

Cite this