A 1 Gb/s PAM-8 Variable-Gain Transimpedance Amplifier (VG-TIA) in 180 nm CMOS Technology

Fikriye Elif Karakuzu; Eray Kutuk; Arda Yildiz; Irem Comertoglu; Ali Dogus Gungordu; Mustafa Berke Yelten

doi:10.1109/SMACD65553.2025.11092127

A 1 Gb/s PAM-8 Variable-Gain Transimpedance Amplifier (VG-TIA) in 180 nm CMOS Technology

Fikriye Elif Karakuzu^*
, Eray Kutuk
, Arda Yildiz
, Irem Comertoglu
, Ali Dogus Gungordu
, Mustafa Berke Yelten

^*Corresponding author for this work

Department of Electronics and Communication Engineering

Istanbul Technical University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This study introduces a 1 Gb/s PAM-8 variable-gain transimpedance amplifier (VG-TIA) implemented in 180 nm technology for optical communication receivers. The proposed VG-TIA employs an inverter-based transimpedance amplifier (TIA) with adjustable feedback resistances to accommodate various gain modes. The gain of the TIA is controlled by a 5-bit thermometer; thus, the VG-TIA provides six gain modes. Simulation results show that the VG-TIA achieves a 45.89 dBΩ transimpedance (TI) gain with 614.4 MHz bandwidth at the lowest gain mode, whereas 75.27 dBΩ TI gain with 553.1 MHz bandwidth at the highest gain mode. The input-referred noise (IRN) varies between 5.42 and 120.8 pA Hz at f_-3dB depending on the gain mode.

Original language	English
Title of host publication	21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9798331523954
DOIs	https://doi.org/10.1109/SMACD65553.2025.11092127
Publication status	Published - 2025
Event	21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025 - Istanbul, Turkey Duration: 7 Jul 2025 → 10 Jul 2025

Publication series

Name	21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025

Conference

Conference	21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025
Country/Territory	Turkey
City	Istanbul
Period	7/07/25 → 10/07/25

Bibliographical note

Publisher Copyright:
© 2025 IEEE.

Keywords

PAM-8
Transimpedance amplifier (TIA)
inverter-based TIA
variable-gain amplifier

Access to Document

10.1109/SMACD65553.2025.11092127

Cite this

Karakuzu, F. E., Kutuk, E., Yildiz, A., Comertoglu, I., Gungordu, A. D., & Yelten, M. B. (2025). A 1 Gb/s PAM-8 Variable-Gain Transimpedance Amplifier (VG-TIA) in 180 nm CMOS Technology. In 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025 (21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SMACD65553.2025.11092127

Karakuzu, Fikriye Elif ; Kutuk, Eray ; Yildiz, Arda et al. / A 1 Gb/s PAM-8 Variable-Gain Transimpedance Amplifier (VG-TIA) in 180 nm CMOS Technology. 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025. Institute of Electrical and Electronics Engineers Inc., 2025. (21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025).

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title = "A 1 Gb/s PAM-8 Variable-Gain Transimpedance Amplifier (VG-TIA) in 180 nm CMOS Technology",

abstract = "This study introduces a 1 Gb/s PAM-8 variable-gain transimpedance amplifier (VG-TIA) implemented in 180 nm technology for optical communication receivers. The proposed VG-TIA employs an inverter-based transimpedance amplifier (TIA) with adjustable feedback resistances to accommodate various gain modes. The gain of the TIA is controlled by a 5-bit thermometer; thus, the VG-TIA provides six gain modes. Simulation results show that the VG-TIA achieves a 45.89 dBΩ transimpedance (TI) gain with 614.4 MHz bandwidth at the lowest gain mode, whereas 75.27 dBΩ TI gain with 553.1 MHz bandwidth at the highest gain mode. The input-referred noise (IRN) varies between 5.42 and 120.8 pA Hz at f-3dB depending on the gain mode.",

keywords = "PAM-8, Transimpedance amplifier (TIA), inverter-based TIA, variable-gain amplifier",

author = "Karakuzu, \{Fikriye Elif\} and Eray Kutuk and Arda Yildiz and Irem Comertoglu and Gungordu, \{Ali Dogus\} and Yelten, \{Mustafa Berke\}",

note = "Publisher Copyright: {\textcopyright} 2025 IEEE.; 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025 ; Conference date: 07-07-2025 Through 10-07-2025",

year = "2025",

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language = "English",

series = "21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025",

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Karakuzu, FE, Kutuk, E, Yildiz, A, Comertoglu, I, Gungordu, AD & Yelten, MB 2025, A 1 Gb/s PAM-8 Variable-Gain Transimpedance Amplifier (VG-TIA) in 180 nm CMOS Technology. in 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025. 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025, Institute of Electrical and Electronics Engineers Inc., 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025, Istanbul, Turkey, 7/07/25. https://doi.org/10.1109/SMACD65553.2025.11092127

A 1 Gb/s PAM-8 Variable-Gain Transimpedance Amplifier (VG-TIA) in 180 nm CMOS Technology. / Karakuzu, Fikriye Elif; Kutuk, Eray; Yildiz, Arda et al.
21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025. Institute of Electrical and Electronics Engineers Inc., 2025. (21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A 1 Gb/s PAM-8 Variable-Gain Transimpedance Amplifier (VG-TIA) in 180 nm CMOS Technology

AU - Karakuzu, Fikriye Elif

AU - Kutuk, Eray

AU - Yildiz, Arda

AU - Comertoglu, Irem

AU - Gungordu, Ali Dogus

AU - Yelten, Mustafa Berke

PY - 2025

Y1 - 2025

N2 - This study introduces a 1 Gb/s PAM-8 variable-gain transimpedance amplifier (VG-TIA) implemented in 180 nm technology for optical communication receivers. The proposed VG-TIA employs an inverter-based transimpedance amplifier (TIA) with adjustable feedback resistances to accommodate various gain modes. The gain of the TIA is controlled by a 5-bit thermometer; thus, the VG-TIA provides six gain modes. Simulation results show that the VG-TIA achieves a 45.89 dBΩ transimpedance (TI) gain with 614.4 MHz bandwidth at the lowest gain mode, whereas 75.27 dBΩ TI gain with 553.1 MHz bandwidth at the highest gain mode. The input-referred noise (IRN) varies between 5.42 and 120.8 pA Hz at f-3dB depending on the gain mode.

AB - This study introduces a 1 Gb/s PAM-8 variable-gain transimpedance amplifier (VG-TIA) implemented in 180 nm technology for optical communication receivers. The proposed VG-TIA employs an inverter-based transimpedance amplifier (TIA) with adjustable feedback resistances to accommodate various gain modes. The gain of the TIA is controlled by a 5-bit thermometer; thus, the VG-TIA provides six gain modes. Simulation results show that the VG-TIA achieves a 45.89 dBΩ transimpedance (TI) gain with 614.4 MHz bandwidth at the lowest gain mode, whereas 75.27 dBΩ TI gain with 553.1 MHz bandwidth at the highest gain mode. The input-referred noise (IRN) varies between 5.42 and 120.8 pA Hz at f-3dB depending on the gain mode.

KW - PAM-8

KW - Transimpedance amplifier (TIA)

KW - inverter-based TIA

KW - variable-gain amplifier

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U2 - 10.1109/SMACD65553.2025.11092127

DO - 10.1109/SMACD65553.2025.11092127

M3 - Conference contribution

AN - SCOPUS:105013470405

T3 - 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025

BT - 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025

Y2 - 7 July 2025 through 10 July 2025

ER -

Karakuzu FE, Kutuk E, Yildiz A, Comertoglu I, Gungordu AD, Yelten MB. A 1 Gb/s PAM-8 Variable-Gain Transimpedance Amplifier (VG-TIA) in 180 nm CMOS Technology. In 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025. Institute of Electrical and Electronics Engineers Inc. 2025. (21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025). doi: 10.1109/SMACD65553.2025.11092127

A 1 Gb/s PAM-8 Variable-Gain Transimpedance Amplifier (VG-TIA) in 180 nm CMOS Technology

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Keywords

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